L&T Technology Services has futuristic solutions and IP Cores that address some of the pressing needs of the semiconductor industry. Our IC designs in areas such as 3D cameras, Speech recognition, Smart Glasses and connectivity programs involving wireless mesh networks and Connected Drones are revolutionizing the semiconductor market. With 900+ chip engineers globally and state-of-the-art R&D infrastructure, we are engineering products for multiple applications ranging from Medical and Auto to Telecom and Consumer Electronics.
STATE OF THE MARKET
As the system-on-chip (SOC) complexity is increasing and the industry is moving toward very deep submicron (VDSM) technology, the standard testing methods are becoming derisory and expensive. This new level of complexity is pushing the threshold of semiconductor technology. It demands the engineers to identify new approach for chip development that keeps up the pace with reducing time-to-market needs and yet remain profitable. Embedded systems' design considerations, real-time testing systems and systems integration are enabling clients to deliver high quality products in very short periods of time.
However, one consequence of technology scaling is the need for increased power density. As Moore’s laws starts to take a nose dive, engineers are exploring alternate solutions such as liquid-cooled microchannel heat sinks. A large heat transfer coefficient can be achieved by reducing the channel hydraulic diameter - Micro-sinks for Micro-chips!
One of the paradigm shifts in the industry is the changing business model from pure play IC sales to bundling of multiple complex products and services. The progress in IoT (Internet of Things) has modified the functionality of individual chip to a system of chip module that can support multi-sensing functions. And thus, single product line offerings are now being replaced with highly targeted innovations.
- 25+ successful ASIC and FPGA products, 900+ Engineers and 80+ patents
- Delivering 500+ embedded designs each year across all domains ranging from switches and telecom base stations to mobile phones, infotainment systems and blade servers
- Custom built Specific IP Cores in Security, Communication and Verification. In addition, IP Cores for Configurable Processor that facilitates seamless scaling of CPU Horsepower
- Engineering new outcomes in Digital Transformation – 5 Tape Outs for 3D Cameras, pioneering SoCs for speech recognition and chip design for next generation VR Glasses
- Extensive partnership ecosystem – alliances such as LoRa, Samsung Artik, Xilinx, Qualcomm, NXP, Intel IoT and Sierra Wireless
ACQUISITION OF ESENCIA
On June 1, 2017, LTTS announced the acquisition of Esencia Technologies, a provider of design services from specification to final product in Digital Signal Processing, Video, Security and Networking.
For more information on the acquisition, please visit http://www.lnttechservices.com/sites/default/files/news/2017-06/ltts-esencia-completion-pr_0.pdf
For more information on Esencia, please visit http://www.esenciatech.com/
- Design and development of ASIC chips (4 Generations of chips for 5 years) that utilize various sensing technologies to achieve depth perception and 3D imaging. Utility in multiple applications such as virtual reality, robotic development and 3D cameras
- Pioneering SoC to enable hardware speech recognition. The chip is used in voice-controlled devices such as personal assistant, and smart-speakers for a “smart” home. Successful Tape Out in less than six months
- ASIC chip that utilizes miniature radar to detect touchless gesture interactions. The chip can be embedded in wearables, phones, computers, automobiles and other IoT devices
- Complete physical design and verification of an image processing SoC – 5 Million Gates with 400+ Macros, 40+ image processing algorithms and 5+ clock domains
- Engineered ruggedized, industrial grade System Basis Chips (SBCs) to operate from -40˚C to +85˚C
- Enabled scan testing for a PC chip design by Scan insertion, ATPG generation, MBIST insertion, BScan and TAP insertion. Integrated block level scan chain with top level and optimized MBIST and functional signals to reduce congestion